Self-scanning light-emitting device

ABSTRACT

A self-scanning light-emitting device is provided in which the amounts of light of light-emitting elements may be corrected to make the distribution of amounts of light in a luminescent chip or among luminescent chips uniform. The correction for amounts of light of light-emitting elements may be carried out by regulating the time duration of on-state of a light-emitting element or the voltage of a write signal applied to a light-emitting element. According to the present invention, the distribution of amounts of light becomes uniform, so that the printing quality of a printer using such self-scanning light-emitting device is improved.

TECHNICAL FIELD

The present invention relates to generally a self-scanninglight-emitting device, particularly to a self-scanning light-emittingdevice whose amount of light may be corrected.

BACKGROUND ART

A light-emitting device in which a plurality of light-emitting elementsare arrayed on the same substrate is utilized as a light source of aprinter, in combination with a driver circuit. The inventors of thepresent invention have interested in a three-terminal light-emittingthyristor having a pnpn-structure as an element of the light-emittingdevice, and have already filed several patent applications (see JapanesePatent Publication Nos. 1-238962, 2-14584, 292650, and 2-92651.) Thesepublications have disclosed that a self-scanning function forlight-emitting elements may be implemented, and further have disclosedthat such selfscanning light-emitting device has a simple and compactstructure for a light source of a printer, and has smaller arrangingpitch of thyristors.

The inventors have further provided a self-scanning light-emittingdevice having such structure that an array of light-emitting thyristorshaving transfer function is separated from an array of light-emittingthyristors having writable function (see Japanese Patent Publication No.2-263668.)

Referring to FIG. 1, there is shown an equivalent circuit diagram of afundamental structure of this self-scanning light-emitting device.According to this structure, the device comprises transfer elements T₁,T₂, T₃ . . . and writable light-emitting elements L₁, L₂, L₃ . . . ,these elements consisting of three-terminal light-emitting thyristors.The structure of the portion of an array of transfer elements includesdiode D₁, D₂, D₃ . . . as means for electrically connecting the gateelectrodes of the neighboring transfer elements to each other. V_(GK) isa power supply (normally 5 volts), and is connected to all of the gateelectrodes G₁, G₂, G₃ . . . of the transfer elements via a load resistorR_(L), respectively. Respective gate electrodes G₁, G₂, G₃ . . . arecorrespondingly connected to the gate electrodes of the writablelight-emitting elements L₁, L₂, L₃ . . . . A start pulse φ_(s) isapplied to the gate electrode of the transfer element T₁, transfer clockpulses φ1 and φ2 are alternately applied to all of the anode electrodesof the transfer elements, and a write signal φ_(I) is applied to all ofthe anode electrodes of the light-emitting elements. The self-scanninglight-emitting device shown in FIG. 1 is a cathode common type, becauseall of the cathodes of the transfer elements and the light-emittingelements are commonly connected to the ground.

Referring to FIG. 2, there are shown respective wave shapes of the startpulse φ_(s), the transfer clock pulses φ1, φ2, and the write pulsesignal φ_(I). The ratio (i.e., duty ratio) between the time duration ofhigh level and that of low level in each of clock pulses φ1 and φ2 issubstantially 1 to 1.

The operation of this self-scanning light-emitting device will now bedescribed briefly. Assume that as the transfer clock φ1 is driven to ahigh level, the transfer element T₂ is now turned on. At this time, thevoltage of the gate electrode G₂ is dropped to a level near zero voltsfrom 5 volts. The effect of this voltage drop is transferred to the gateelectrode G₃ via the diode D₂ to cause the voltage of the gate electrodeG₃ to set about 1 volt which is a forward rise voltage (equal to thediffusion potential) of the diode D₂. On the other hand, the diode D₁ isreverse-biased so that the potential is not conducted to the gate G₁,then the potential of the gate electrode G₁ remaining at 5 volts. Theturn on voltage of the light-emitting thyristor is approximated to agate electrode potential+a diffusion potential of PN junction (about 1volt.) Therefore, if a high level of a next transfer clock pulse φ2 isset to the voltage larger than about 2 volts (which is required toturnon the transfer element T₃) and smaller than about 4 volts (which isrequired to turn on the transfer element T₅), then only the transferelement T₃ is turned on and other transfer elements remain off-state,respectively. As a result of which, on-state is transferred from T₂ toT₃. In this manner, on-state of transfer elements are sequentiallytransferred by means of two-phase clock pulses.

The start pulse φ_(s) works for starting the transfer operationdescribed above. When the start pulse φ_(s) is driven to a low level(about 0 volt) and the transfer clock pulse φ2 is driven to a high level(about 2-4 volts) at the same time, the transfer element T₁ is turnedon. Just after that, the start pulse φ_(s) is returned to a high level.

Assuming that the transfer element T₂ is in the on-state, the voltage ofthe gate electrode G₂ is lowered to almost zero volt. Consequently, ifthe voltage of the write signal φ_(I) is higher than the diffusionpotential (about 1 volt) of the PN junction, the light-emitting elementL₂ may be turned into an on-state (a light-emitting state).

On the other hand, the voltage of the gate electrode G₁, is about 5volts, and the voltage of the gate electrode G₃ is about 1 volt.Consequently, the write voltage of the light-emitting element L₁ isabout 6 volts, and the write voltage of the light-emitting element L₃ isabout 2 volts. It follows from this that the voltage of the write signalφ_(I) which can write into only the light-emitting element L₂ is in arange of about 1-2 volts. When the light-emitting element L₂ is turnedon, that is, in the light-emitting state, the amount of light thereof isdetermined by the write signal φ_(I). Accordingly, the light-emittingelements may emit light at any desired amount of light. In order totransfer on-state to the next element, it is necessary to first turn offthe element in on-state by temporarily dropping the voltage of the writesignal φ_(I) down to zero volts.

The self-scanning light-emitting device described above may befabricated by arranging a plurality of luminescent chips each thereof isfor example 600 dpi (dots per inch)/128 light-emitting elements and hasa length of about 5.4 mm. These luminescent chips may be obtained bydicing a wafer in which a plurality of chips are fabricated. While thedistribution of amounts of light of light-emitting elements in one chipis small, the distribution of amounts of light among chips is large.Referring to FIGS. 3A and 3B, there is shown an example of thedistribution of amounts of light in a wafer. FIG. 3A shows a plan view athree-inch wafer 10, wherein an x-y coordinate system is designated. Thelight-emitting elements are arranged in a direction of x-axis, and thelength of one luminescent chip is about 5.4 mm. FIG. 3B shows thedistribution of amounts of light at locations in the x-y coordinatesystem. It should be noted in FIG. 3B that the amount of light isnormalized by an average value within a wafer. In FIG. 3B, fourdistributions of amounts of light are shown, with y-locations beingdifferent (i.e., y=0, 0.5, 1.0, and 1.35 inches).

It is apparent from FIG. 3B that each distribution of amounts of lightin a chip is within the deviation of at most ±0.5% except chips aroundthe extreme peripheral part of a wafer, but the average values ofamounts of light in respective chips on a wafer are distributed in arange of the deviation of about 6%, because the amounts of light in awafer are distributed like the shape of the bottom of a pan as shown inFIG. 3B. It has been noted that another wafers have distributionssimilar to that of FIG. 3B, and average values of amounts of light arevaried among wafers. In this manner, while the amounts of light aredistributed in a small range in a chip, the average values of amount oflight of respective chips in a wafer are distributed broadly.

Therefore, a self-scanning light-emitting device having a uniformdistribution of amounts of light has provided heretofore by arrangingluminescent chips whose average values of amounts of light aresubstantially the same. For example, in order to hold the distributionof average values of amounts of light of chips constituting oneself-scanning light-emitting device into the deviation of ±1%,luminescent chips are required to be grouped into a plurality of rankseach having ±1% deviation of average values of amounts of light toarrange chips included in the same rank in fabricating a self-scanninglight-emitting device (see Japanese Patent Publication No. 9-319178).

In fact, the resistance of resistors in the self-scanning light-emittingdevice and the output impedance of a driver circuit for theself-scanning light-emitting device have errors, respectively, so thatthe deviation of average value of amounts of light for one rank isrequired to further be decreased. In order to decrease the dispersion ofthe output impedance of a driver circuit, the output impedance itself isneeded to be decreased, resulting in increasing of the area of a chipand the cost thereof. Furthermore, when the self-scanning light-emittingdevice is used for an optical device such as a printer, the accuracy ofa lens system is required.

If the number of ranks for average values of amounts of light is large,the work for grouping chips into ranks is not only very complicated butalso has a poor manufacturing efficiency because many kinds of stokedchips are required.

DISCLOSURE OF INVENTION

The object of the present invention is to provide a self-scanninglight-emitting device in which the distribution of amounts of light maybe corrected in a chip or among chips by regulating the amount of lightfor a light-emitting element.

According to a first aspect of the present invention, a self-scanninglight-emitting device is provided, this device comprising: aself-scanning transfer element array having such a structure that aplurality of three-terminal transfer elements each having a controlelectrode for controlling threshold voltage or current are arranged, thecontrol electrodes of the transfer elements neighbored to each other areconnected via first electrical means, a power supply line is connectedto the control electrodes via second electrical means, and clock linesare connected to one of two terminals other than the control electrodeof each of the transfer elements; a light-emitting element array havingsuch a structure that a plurality of three-terminal light-emittingelements each having a control electrode for controlling thresholdvoltage or current are arranged, the control electrodes of thelight-emitting element array are connected to the control electrodes ofthe transfer element array, and a line for applying a write signalconnected to one of two terminals other than the control electrode ofeach of the light-emitting elements is provided; and a driver circuitfor regulating the time duration of on-state of each of thelight-emitting elements to correct amounts of light so as to make thedistribution of amounts of light uniform.

According to a second aspect of the present invention, a self-scanninglight-emitting device is provided, this device comprising: aself-scanning transfer element array having such a structure that aplurality of three-terminal transfer elements each having a controlelectrode for controlling threshold voltage or current are arranged, thecontrol electrodes of the transfer elements neighbored to each other areconnected via first electrical means, a power supply line is connectedto the control electrodes via second electrical means, and clock linesare connected to one of two terminals other than the control electrodeof each of the transfer elements; a light-emitting element array havingsuch a structure that a plurality of three-terminal light-emittingelements each having a control electrode for controlling thresholdvoltage or current are arranged, the control electrodes of thelight-emitting element array are connected to the control electrodes ofthe transfer element array, and a line for applying a write signalconnected to one of two terminals other than the control electrode ofeach of the light-emitting elements is provided; and a driver circuitfor regulating the voltage of the write signal applied to each of thelight-emitting elements to correct amounts of light thereof so as tomake the distribution of amounts of light uniform.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an equivalent circuit diagram of a self scanninglight-emitting device.

FIG. 2 is a wave shape diagram of the signals of the circuit shown inFIG. 1.

FIGS. 3A and 3B are diagrams illustrating an example of the distributionof amounts of light in a wafer.

FIG. 4 shows a driver circuit for driving a chip of “an anode common,two-phase driving self-scanning light-emitting device”.

FIG. 5 is an equivalent circuit diagram of one luminescent chip.

FIG. 6 shows the structure of a driver circuit

FIG. 7 is a timing diagram of input signals in the driver circuit.

FIG. 8 shows the measurements of amounts of light before and aftercorrection.

FIG. 9 shows a driver circuit for driving chips of “a cathode common,two-phase driving self-scanning light-emitting device”.

FIG. 10 is a timing diagram of input signals in the driver circuit shownin FIG. 9.

FIG. 11 shows another example of a driver circuit.

FIG. 12 is a timing diagram of signals for driving the driver circuit inFIG. 11.

FIG. 13 shows how the light output of each of light-emitting elements isvaried by the input signals.

FIG. 14 is another example of a driver circuit.

FIGS. 15A and 15B show the relationship between the voltage V(80) andV(71).

DESCRIPTION OF A PREFERRED EMBODIMENT

The embodiments of the present invention will now be described withreference to the drawings.

First Embodiment

The present embodiment is directed to a self-scanning light-emittingdevice in which the time duration of on-state of each of thelight-emitting elements is regulated to correct amounts of light so asto make the distribution of amounts of light uniform.

Referring to FIG. 4, there is shown a driver circuit for drivingluminescent chips of “an anode common, two-phase driving self-scanninglight-emitting device”. A driver circuit 14 for driving five luminescentchips 12-1, 12-2, . . . , 12-5 supplies a start pulse φ_(s) andtwo-phase clock pulses φ1, φ2 to each chip, respectively. The drivercircuit 14 also supplies a write signal φ_(I) 1, φ_(I) 2, φ_(I) 3, φ_(I)4 and φ_(I) 5 to each chip, respectively.

Referring to FIG. 5, there is shown a equivalent circuit diagram of oneluminescent chip. Different to the circuit shown in FIG. 1, this circuitis an anode common circuit in which all of the anodes of the transferelements and light-emitting elements are commonly connected to theground. Consequently, it should be noted that each polarity of the startpulse φ_(s), the two-phase clock pulses φ1, φ2, and the write signalφ_(I) is opposite to that of the signals shown in FIG. 2. V_(GA) in FIG.5 designates a supply voltage and the polarity thereof is opposite tothat of V_(GK) in FIG. 1.

Referring to FIG. 6, there is shown the structure of the driver circuit14. The driver circuit 14 comprises a counter 18, a shift register 20,and circuits for generating each write signal φ_(I) 1-φ_(I) 5,respectively. These circuits have the same structure, then the circuit21 for generating the write signal φ_(I) 1 is typically explained.

The circuit 21 comprise a Read Only Memory (ROM) 22, two-stage D-typeflip-flops (D-FF) 24, 26, a comparator 28, an OR gate 30, and a buffer32. A generation of a correction data stored in the ROM 22 will beexplained hereinafter.

Referring to FIG. 7, there is shown a timing diagram for each inputsignal in the driver circuit 14. The operation of the driver circuitwill now be described with reference to this timing diagram. In thedriver circuit 14, the pulses φ1, φ2, and 100 _(s) are obtained bypassing input signals v1, v2 and V_(s) as they are. A data signal “Data”includes five data in one period of the input signal V_(I). Each dataincludes a designation for emitting light/not emitting light at itstiming to each luminescent chip. The level of the data signal is held asa data R1 to the first stage D-FF 24 at the leading edge of an outputsignal Q1 from the shift register 20. The stored data R1 is then held tothe second stage D-FF 26 at the leading edge of an input signal D_(ltc).

The counter 18 counts the number of leading edges of a fundamental clockC_(clk) since a reset pulse C_(rst) rises. The output signal from thecounter 18 is compared with the value of the correction data from theROM 22. When the counted value becomes larger than the value of thecorrection data, an output signal C_(o) 1 is driven to a low level.

An output signal D_(Q) 1 from the second stage D-FF 26, the outputsignal C_(o) 1 from the comparator 28, and an input signal V_(I) areORed at the OR gate 30 to generate a write signal φ_(I) 1.

An experiment has been implemented for the case that the period of theclock C_(clk) is 20 ns, the period of the input signal V_(I) is 1500 ns,and the time duration when the input signal V_(I) is at a low level is1200 ns. At first, the correction data of all of the ROMs was set to“0”, and the amounts of light (i.e., light output) were measured to thefive chips, with all of the light-emitting elements being on-state. Theresult is shown in FIG. 8 as measurements before correction. In thefigure, a light output is designated by power (μW) averaged in time.According to the measurements before correction, it is understood thatthe dispersion of the amounts of light among chips (chip 1, chip 2, . .. , chip 5) is large.

Based on the measurements before correction, a correction data wasdetermined so that an average value of amounts of light of each chip is4.5 μW. The correction data

D_(E)n for the nth chip was obtained according to the following formula.

D_(E)n=75-int(60×4.5 μW/average value of amounts of light of the nthchip)

Wherein “int” is a function which represents an integer part of thenumerical value in parentheses, the numeral “75”=V_(I) period/C_(clk)period, and the numeral “60”=(the time duration when the signal V_(I) isat a low level)/C_(clk) period.

The correction data D_(E)n for each chip thus obtained was stored intothe ROM 22. Next, the amounts of light were measured to the five chips,with all of the light-emitting elements being on-state. The result isshown in FIG. 8 as measurements after correction.

Table 1 shows the average light output before and after correction foreach chip, and the deviation of the average light output, which arecalculated from the measurements shown in FIG. 8, together with thevalue of the correction data.

TABLE 1 chip 1 chip 2 chip 3 chip 4 chip 5 Average Before Light 5.3495.101 5.149 4.900 5.051 5.110 Correction Output (μW) Deviation (%) 4.67−0.18 0.76 −4.11 −1.15 −0.00 After Light 4.457 4.421 4.462 4.492 4.4624.459 Correction Output (μW) Deviation (%) −0.03 −0.85 0.08 0.74 0.070.00 Correction Data 25 23 23 20 22

It is understood from the Table 1 that the distribution of amounts oflight of the five chips may be corrected so as to be within a deviationof ±1%.

The present embodiment is based on the recognition that the correctionfor amounts of light is enough to carry out among chips, because thedistribution of amounts of light is small in a chip. Correction data areheld every chip, and respective time durations for light-emittingelements are regulated based on the correction data to make the averagevalue of amounts of light among chips uniform.

Second Embodiment

The present embodiment is directed to a self-scanning light-emittingdevice in which the voltage of a write signal applied to each of thelight-emitting element is regulated to correct amounts of light thereofso as to make the distribution of amounts of light uniform.

Referring to FIG. 9, there is shown a driver circuit 36 for drivingchips 34 of “a cathode common, two-phase driving self-scanninglight-emitting device”. In the figure, three luminescent chips 34-1,34-2, and 34-3 are illustrated. The driver circuit 36 for driving thesechips supplies a start pulse φ_(s), two-phase clock pulses φ1, φ2, awrite signal φ_(I), a supply voltage V_(GK) to each chip, respectively.

The driver circuit 36 comprises CMOS inverter-type buffers 38 for eachof signals φ_(s), φ1, φ2 and φ_(I), each buffer being composed of anNMOS transistor 37 and a PMOS transistor 39. Especially, the buffer forthe write signal φ_(I) is further provided with a digital/analogconverter (DAC) 40 for outputting a voltage at its power supply side.

The DAC 40 is composed of 8-bit DAC to output the voltage of OV when adigital value of an input signal D1, D2 or D3 is “00H” and the voltageof 5V when the digital value is “FFH”. The voltage value smaller than1.5V is not used in the DAC 40, because the voltage of the write signalφ_(I) to turn on a light-emitting element is about 1.5V. Assuming thatthe light output of a light-emitting element is proportional to thevalue of voltage supplied to the anode thereof,

(5V−1.5V)/5V×255 levels=178.5 levels

is established. Therefore, 178 levels of light outputs may beimplemented by varying a digital input value for the DAC.

In FIG. 9, there are shown input signals to the driver circuit 36, i.e.input signals V_(s), V1, V2, (V_(I) 1, V_(I) 2, V₁ 3), and (D1, D2, D3).The input signal V_(I) 1, V_(I) 2 and V_(I) 3 are the signals togenerate the write signal φ_(I) for each chip, and the input signals D1,D2 and D3 are input digital signals (8 bits) that are correction datafor respective chips.

Referring to FIG. 10, there is shown a timing diagram for each inputsignal to the driver circuit 36. As stated above, the correction dataD1, D2 and D3 are input to the DACs 40, respectively, to output the 178levels of voltage. These output voltages may be sequentially writteninto all of the light-emitting elements at the timing of power-on of thebuffers 38, i.e., at the timing of a low level of the input signal V_(I)1, V_(I) 2 or V_(I) 3. At this time, the correction for the amounts oflight of all of the light-emitting elements may be implemented byselecting the correction data to vary respective voltage of writesignals to the light-emitting elements.

In this manner, the correction for the amounts of light may beimplemented to all of the light-emitting elements. It is also possibleto correct the amounts of light among chips. In this case, thecorrection data is written into the DAC 40 at the timing of power-on andis held thereto.

According to the present embodiment, the correction for amounts of lightmay be implemented by modulating a voltage, so that a precisioncorrection for amounts of light is possible.

Third Embodiment

A driver circuit 68 shown in FIG. 11 is a variation of the drivercircuit shown in FIG. 9. In this variation, a buffer for a write signalφ_(I) comprises a CMOS inverter (composed of an NMOS transistor 61 and aPMOS transistor 63) provided with a diode 64 for voltage shifting at apower supply side, and an NMOS transistor 62 connected parallel to aserial circuit of the diode 64 and the NMOS transistor 62. In thefigure, this buffer is designated by reference numeral 66. The buffersfor 100 _(s), φ1 and φ2 have the same structures as that of the buffers38 in FIG. 9.

In FIG. 11, there are shown input signals to the driver circuit 68, i.e.input signals V_(s), V1, V2,(V_(I) 1, V_(I) 2, V_(I) 3), and (V_(D) 1,V_(D) 2, V_(D) 3), The input signals V_(D) 1, V_(D) 2 V_(D) 3 are thesignals to modulate the voltage of the write signal to each chip.

When the signal V_(I) 1 is driven to a low level during a high level ofthe signal V_(D) 1, only NMOS transistor 61 is turned on to supply avoltage via the diode 64 and the transistor 61 to a φ_(I) signalterminal of the chip 34-1. Since a forward rise voltage of a silicondiode is 0.6V, the output voltage of the buffer 66 becomes 4.4V when thesupply voltage is 5V. On the other hand, when the signal V_(D) 1 isdriven to a low level during a low level of the signal V₁ 1, not onlythe NMOS transistor 61 but also the NMOS transistor 62 are turned on, sothat the potential difference across the diode 64 becomes 0V and thediode is turned off. Therefore, the current path of the transistor 62becomes effective and the output voltage of the buffer 66 is held at 5Vof the supply voltage.

Since the (φ_(I) signal voltage to turn on a light-emitting element is1.5V, when the signal V₁ 1 is low and the signal V_(D) 1 is high, theφ_(I) signal current becomes (4.4-1.5)/R_(I), on the other hand, whenthe signal V_(I) 1 is low and the signal V_(D) 1 is low, the φ_(I)signal current becomes (5-1.5)/R_(I), wherein R_(I) is a resistance of acurrent limiting resistor 35. It follows that the φ_(I) signal currentwhen the signal V_(D) 1 is at a high level is decreased by 17% comparedwith that when the signal V_(D) 1 is low.

The correction of amounts of light for light-emitting elements iscarried out by regulating a percentage of the time duration when thesignal V_(D) 1 is at a low level with respect to the time duration whenthe signal V_(I) 1 is at a low level. According to this method, whilethe range to be regulated has only the range of 17% decrease of theφ_(I) signal current described above, the correction of amounts of lightmay be implemented at a resolution of 17%/20≈1% in the case that thetime duration when the signal V_(I) 1 is at a low level perlight-emitting element is 400 ns and the period of a fundamental clockis 20 ns. When further width of the regulation range is required, thenumber of diodes may be increased such as 2, 3, . . . .

Referring to FIG. 12, there is shown a timing diagram of signals fordriving the driver circuit 68. It is apparent from this timing diagramthat the time duration when each of the signals V_(D) 1, V_(D) 2 andV_(D) 3 is at a low level is regulated during the time duration wheneach of the signals V_(I) 1, V_(I) 2, and V_(I) 3 is at a low level.

FIG. 13 shows how the light output of each of light-emitting elements isvaried by an example of the timing of the input signals. In FIG. 13, thelight outputs are shown with respect to the signals V_(I) 1 and V_(D) 1,and L(#n) shows the light output of nth light-emitting element in thefirst chip (i.e., the chip on the left side in FIG. 11). It would beunderstood that the amounts of light may be corrected by regulating thetime duration when the signal V_(D) 1 is at a low level.

While a diode is used for voltage shifting in the present embodiment, aresistor may also be used. Also, in the present embodiment, thecorrection of amounts of light among chips may be implemented. ForthEmbodiment

According to the driver circuit 68 shown in FIG. 11, both of the powersupply for the NMOS transistor 62 and that for the CMOS inverter (61,63) are taken from the power supply V_(GK) (+5V). In the presentembodiment, the driver circuit 70 shown in FIG. 14, the power supplyline 82 for the NMOS transistor 62 is independently derived to a voltageterminal 80 for modulating a φ_(I) signal. Other structure is the sameas that shown in FIG. 11, so that like element is designated by likereference character in FIG. 11. The reference numerals 71, 72 and 73show φ_(I) signal output terminals, respectively.

In the driver circuit 70 described above, a seven step-wise voltageV(80) as shown in FIG. 15A is applied to the voltage terminal 80. Inthis example, the voltage on Nth-step is set so as to be 4.4+0.1×(N−1)²).

The voltage V(71) of the φ_(I) signal output terminal 71 may be variedby means of the signal V_(D) 1. When the signal V_(I) 1 is at a lowlevel, the NMOS transistor 61 is turned on. At this time, if the signalV_(D) 1 is at a high level, then the current flows through the diode 64and the NMOS transistor 61 so that the voltage V(71) becomes 4.4v. Ifthe signal V_(D) 1 is at a low level, then the NMOS transistor 62 isturned on, therefore the voltage V(71) is determined by the voltageV(80) of the voltage terminal 80. This manner is shown in FIG. 15B, thatis, the voltage V(80) is output to the terminal 71 when the signal V_(D)1 is at a low level.

According to such variation of the voltage V(71), the average voltageduring the time duration when a light-emitting element is turned onbecomes 4.71V. In this manner, the average voltage may be regulated at aresolution of 0.014V between 4.4V and 5.3V. Therefore, the accumulatedamount of light may be regulated.

In this embodiment, while the minimum value of the voltage V(80) forregulating the amount of light is 4.4V, the minimum value may be furtherdecreased by increasing the number of diodes 64.

Industrial Applicability

According to the present invention described above, the correction ofamounts of light in the self-scanning light-emitting device may beimplemented in a chip or among chips. As a result, the printing qualitymay be enhanced in the printer head using a self-scanning light-emittingdevice according to the present invention.

What is claimed is:
 1. A self-scanning light-emitting device,comprising: a self-scanning transfer element array having such astructure that a plurality of three-terminal transfer elements eachhaving a control electrode for controlling threshold voltage or currentare arranged, the control electrodes of the transfer elements neighboredto each other are connected via first electrical means, a power supplyline is connected to the control electrodes via second electrical means,and clock lines are connected to one of two terminals other than thecontrol electrode of each of the transfer elements; a light-emittingelement array having such a structure that a plurality of three-terminallight-emitting elements each having a control electrode for controllingthreshold voltage or current are arranged, the control electrodes of thelight-emitting element array are connected to the control electrodes ofthe transfer elements, and a line for applying a write signal connectedto one of two terminals other than the control electrode of each of thelight-emitting elements is provided; and a driver circuit for regulatingthe time duration of on-state of each of the light-emitting elements tocorrect amounts of light in every luminescent chip constituting theself-scanning light-emitting device so as to make the distribution ofamounts of light among the chips uniform.
 2. A self-scanninglight-emitting device, comprising a self-scanning transfer element arrayhaving such a structure that a plurality of three-terminal transferelements each having a control electrode for controlling thresholdvoltage or current are arranged, the control electrodes of the transferelements neighbored to each other are connected via first electricalmeans, a power supply line is connected to the control electrodes viasecond electrical means, and clock lines are connected to one of twoterminals other than the control electrode of each of the transferelements; a light-emitting element array having such a structure that aplurality of three-terminal light-emitting elements each having acontrol electrode for controlling threshold voltage or current arearranged, the control electrodes of the light-emitting element array areconnected to the control electrodes of the transfer element array, and aline for applying a write signal connected to one of two terminals otherthan the control electrode of each of the light-emitting elements isprovided; and a driver circuit for regulating the time duration ofon-state of each of the light-emitting elements to correct amounts oflight thereof in each of luminescent chips constituting theself-scanning light-emitting device so as to make the distribution ofamounts of light in each luminescent chip uniform.
 3. The self-scanninglight-emitting device of claim 1 or 2, wherein the driver circuitincludes a circuit for generating the write signal every luminescentchip, each said generating circuit holding a correction data forregulating the time duration of on-state of each of the light-emittingelements to correct amounts of light thereof.
 4. The self-scanninglight-emitting device of claim 3, wherein the correction data is formedby causing all of the light-emitting elements to turn on withoutcorrecting amounts of light thereof, and measuring amounts of light ofturned-on light-emitting elements to obtain the correction data.
 5. Theself-scanning light-emitting device of claim 4, wherein both of thethree-terminal transfer element and the three-terminal light-emittingelements are three-terminal light-emitting thyristors.
 6. Aself-scanning light-emitting device, comprising: a self-scanningtransfer element array having such a structure that a plurality ofthree-terminal transfer elements each having a control electrode forcontrolling threshold voltage or current are arranged, the controlelectrodes of the transfer elements neighbored to each other areconnected via first electrical means, a power supply line is connectedto the control electrodes via second electrical means, and clock linesare connected to one of two terminals other than the control electrodeof each of the transfer elements; a light-emitting element array havingsuch a structure that a plurality of three-terminal light-emittingelements each having a control electrode for controlling thresholdvoltage or current are arranged, the control electrodes of thelight-emitting element array are connected to the control electrodes ofthe transfer element array, and a line for applying a write signalconnected to one of two terminals other than the control electrode ofeach of the light-emitting elements is provided; and a driver circuitfor regulating the voltage of the write signal applied to each of thelight-emitting elements to correct amounts of light thereof in each ofluminescent chips constituting the self-scanning light-emitting deviceso as to make the distribution of amounts of light in one luminescentchip uniform.
 7. A self-scanning light-emitting device, comprising: aself-scanning transfer element array having such a structure that aplurality of three-terminal transfer elements each having a controlelectrode for controlling threshold voltage or current are arranged, thecontrol electrodes of the transfer elements neighbored to each other areconnected via first electrical means, a power supply line is connectedto the control electrodes via second electrical means, and clock linesare connected to one of two terminals other than the control electrodeof each of the transfer elements; a light-emitting element array havingsuch a structure that a plurality of three-terminal light-emittingelements each having a control electrode for controlling thresholdvoltage or current are arranged, the control electrodes of thelight-emitting element array are connected to the control electrodes ofthe transfer element array, and a line for applying a write signalconnected to one of two terminals other than the control electrode ofeach of the light-emitting elements is provided; and a driver circuitfor regulating the voltage of the write signal applied to each of thelight-emitting elements to correct amounts of light in every luminescentchip constituting the self-scanning light-emitting device so as to makethe distribution of amounts of light among the chips uniform.
 8. Theself-scanning light-emitting device of claim 6 or 7, wherein the drivercircuit includes a buffer for applying a voltage to the line forapplying the write signal, the buffer being provided to everyluminescent chip constituting the self-scanning light-emitting device,and a digital/analog converter provided on power supply side of thebuffer, and wherein the output voltage of the buffer is regulated byselecting the input digital value to the converter.
 9. The self-scanninglight-emitting device of claim 8, wherein the buffer is a CMOSinverter-type buffer.
 10. The self-scanning light-emitting device ofclaim 6 or 7, wherein the driver circuit includes a buffer for applyinga voltage to the line applying for the write signal, the buffercomprises, a CMOS circuit consisting of a first and second MOStransistors, a voltage shifting element provided between the first MOStransistor and a power supply, and a third MOS transistor connected inparallel to a serial circuit of the voltage shifting element and thefirst MOS transistor, the conductivity type being the same as that ofthe first MOS transistor.
 11. The self-scanning light-emitting device ofclaim 10, wherein the voltage shifting element is a diode or resistor.12. The self-scanning light-emitting device of claim 6 or 7, wherein thedriver circuit includes a buffer for applying a voltage to the lineapplying for the write signal, the buffer comprises, a CMOS circuitconsisting of a first and second MOS transistors, a voltage shiftingelement provided between the first MOS transistor and a power supply,and a third MOS transistor connected between a junction point of thefirst and second MOS transistors and a power supply for modulating thewrite signal, the conductivity type being the same as that of the firstMOS transistor.
 13. The self-scanning light-emitting device of claim 12,wherein the voltage shifting element is a diode or resistor.
 14. Theself-scanning light-emitting device of claim 6 or 7, wherein both of thethree-terminal transfer element and the three-terminal light-emittingelements are three-terminal light-emitting thyristors.